Error Detection Method




With the advent of multimedia and realistic physics in games, the home use of computers is becoming more computationally intensive. With computationally intensive use, intermittent errors may occur more frequently. As hardware and software become more complicated intermittent hardware errors may become more difficult to diagnose. A need therefore exists for an improved manner of detecting errors such as hardware errors in electronic components.



Our researchers at the University of Nevada, Reno have created an apparatus, program product, and method that runs an algorithm on a hardware based processor, generates a hardware error as a result of running the algorithm, generates an algorithm output for the algorithm, compares the algorithm output to another output for the algorithm, and detects the hardware error from the comparison. The algorithm is designed to cause the hardware based processor to heat to a degree that increases the likelihood of hardware errors to manifest, and the hardware error is observable in the algorithm output. This will significantly benefit the industry as seen through the advantages below.



  • Our technology can diagnose hardware errors in basically any programmable electronic device with a processor and a memory, and having one or more electronic components within which hardware errors may be exhibited during the execution of program instructions by the processor.
  • The algorithm has both the features of error magnification and propagation. In some implementations, even a one bit error sufficiently alters the algorithm output such that a hardware error can be detected.
  • Errors can be detected while the components are still actively being stressed compared to testing after ceasing hardware stress which isn’t as accurate.


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Patent Information:
For Information, Contact:
Shannon Sheehan
Manager, Technology Commercialization
University of Nevada, Reno
Eric Olson